View BD4271FP2-C_8586043.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

product structure silicon monolithic integrated circuit this product is not designed protec tion against radioactive rays 1/28 tsz02201-0g9g0an00610-1-2 ? 2016 rohm co., ltd. all rights reserved. 21.jun.2016 rev.002 www.rohm.co.jp tsz22111 ? 14 ? 001 hrp7 to263-7 ldo regulators with watch do g and timer voltage detector 550 ma output ldo regulator with wdt and voltage detector bd4271hfp-c BD4271FP2-C general description bd4271hfp-c is automotive voltage regulator with watchdog timer and offers the output current of 550ma while limiting the quiescent current low. a logical high at the ctl pin enables the ldo regulator and low disables the ldo regulator and keeps current consumption low. a reset signal is generated for an output voltage v o of typ 4.65v. the reset delay time and watchdog time (wdt) can be programmed by the external capacitor. features low esr ceramic capacitors applicable for output low drop voltage: pdmos output transistor power on and under-voltage reset programmable reset delay and watchdog time by external capacitor applications 1 onboard vehicle device (engine ecu, body-control, car stereos, satellite navigation system, etc.) key specifications ? aec-q100 qualified (note 1) ? qualified for automotive applications ? wide temperature range (tj): -40 c to +150 c ? wide operating input range: -0.3 v to 45 v ? low quiescent current: 75 a (typ) ? output load current: 550 ma ? output voltage: 5.0 v (typ) 2 % ? reset detect voltage accuracy: 4.53 v to 4.77 v 4.65 v (typ) ? enable input ? over current protection (ocp) ? thermal shut down(tsd) (note1: grade 1) package w(typ) d(typ) h(max) hfp: hrp7 9.395 mm 10.540 mm 2.005 mm fp2: to263-7 10.00 mm x 14.95 0 mm x 4.50 0 mm typical application circuit c in 0.1f, c ct = 0.001 f to 10 f, c o 6 f c ct c o c in vcc ctl ro gnd ct clk vo datashee t downloaded from: http:///
datasheet d a t a s h e e t 2/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 pin configurations pin descriptions pin no. pin name function 1 vcc input 2 ctl output control 3 ro reset output 4 gnd ground 5 ct setting reset delay ti me and wdt time 6 clk input clk from microcomputer 7 vo output fin gnd ground block diagram reference error amplifier reference ct vo ro vcc uvlo tsd ocp vo gnd control clk ctl hrp7 (top view) 1 2 3 4 5 6 7 fin 13 46 7 25 to263-7 (top view) downloaded from: http:///
datasheet d a t a s h e e t 3/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 block descriptions block name function description of blocks tsd thermal shutdown protection the tsd protects the dev ice from overheating. if the chip temperature (tj) reaches ca. 175 c (typ), the output is turned off. reference reference voltage the reference generates the reference voltage. ocp over current protection the ocp protects the device from damage caused by over current. uvlo under voltage lock out the uvlo prevents malfunction of the reset block in case of very low output voltage. error amplifier error amplifier the error amplifier amplifies the difference between the feed back voltage of the output voltage and the reference voltage. control reset + wdt time control the reset delay time and watchdog time can be programmed. downloaded from: http:///
datasheet d a t a s h e e t 4/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 absolute maximum ratings parameter symbol limits unit supply voltage v cc -0.3 to +45.0 v output control voltage v ctl -0.3 to +45.0 v ro voltage v ro -0.3 to +7.0 ( v o + 0.3) v output voltage v o -0.3 to +7.0 v clk voltage v clk -0.3 to v o v junction temperature range tj -40 to +150 c storage temperature range ts t g -55 to +150 c maximum junction temperature tjmax +150 c caution : exceeding the absolute maximum rati ng for supply voltage, operating temperature or other parameters can result in damages to or destruction of the chip. in this event it also becomes impossible to de termine the cause of the damage (e .g. short circuit, open circuit, etc.). therefore, if any special mode is being considered with values expected to exc eed the absolute maximum ratings, implementing physical safety mea sures, such as adding fuses, should be considered. recommended operating conditions (-40c tj +150c) parameter symbol min max unit supply voltage (i o 300 ma) v cc 5.5 45.0 v supply voltage (i o 550 ma) v cc 6.0 45.0 v output control voltage v ctl 0 45.0 v start -up voltage (note 1) v cc 3.0 v output current i o 0 550 ma operating ratings temperature ta -40 +125 c (note 1) when i o = 0 ma. downloaded from: http:///
datasheet d a t a s h e e t 5/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 thermal resistance (note 1) parameter symbol thermal resistance (typ) unit 1s (note 3) 2s2p (note 4) hrp7 junction to ambient ja 96.0 22.0 c/w junction to top characterization parameter (note 2) jt 6 2 c/w to263-7 junction to ambient ja 80.7 20.3 c/w junction to top characterization parameter (note 2) jt 8 2 c/w (note 1)based on jesd51-2a(still-air) (note 2)the thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface of the component package. (note 3)using a pcb board based on jesd51-3. layer number of measurement board material board size single fr-4 114.3mm x 76.2mm x 1.57mmt top copper pattern thickness footprints and traces 70 m (note 4)using a pcb board based on jesd51-5, 7. layer number of measurement board material board size thermal via (note 5) pitch diameter 4 layers fr-4 114.3mm x 76.2mm x 1.6mmt 1.20mm 0.30mm top 2 internal layers bottom copper pattern thickness copper patte rn thickness copper pattern thickness footprints and traces 70 m 74.2mm x 74.2mm 35 m 74.2mm x 74.2mm 70 m (note 5) this thermal vi a connects with the copper pattern of all layers. downloaded from: http:///
datasheet d a t a s h e e t 6/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 electrical characteristics (ldo) (unless otherwise specified, tj = -40 c to +150 c, v cc = 13.5 v, v ctl = 5 v, i o = 0 ma, the typical value is defined at tj = 25 c) parameter symbol limit unit conditions min typ max circuit current i cc 75 150 a i o = 0 ma standby current i st 2.0 9.0 a v ctl = 0 v tj 125 c output voltage v o 4.90 5.00 5.10 v 6 v v cc 40 v 0 ma i o 300 ma output voltage v o 4.90 5.00 5.10 v 8 v v cc 26 v i o 550 ma dropout voltage ? v d 0.2 0.5 v v cc = 4.75 v i o = 300 ma ripple rejection r.r. 60 db f = 120 hz, ein = 1 vrms i o = 100 ma line regulation reg.i -30 30 mv 8 v v cc 16 v load regulation reg.l 10 40 mv 10 ma i o 300 ma thermal shut down tsd 175 c tj at tsd on over current protection i o 550 ma ctl on mode voltage v thh 2.7 v active mode ctl off mode voltage v thl 0.8 v off mode ctl input current i ctl 15 30 a v ctl = 5 v downloaded from: http:///
datasheet d a t a s h e e t 7/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 electrical characteristics (reset, wdt function) (unless otherwise specified, tj = -40 c to +150 c, v cc = 13.5 v, v ctl = 5 v, i o = 0 ma, the typical value is defined at tj = 25 c) parameter symbol limit unit conditions min typ max reset detection voltage v rt 4.53 4.65 4.77 v reset detection hysteresis v rhy 25 60 100 mv 3.5 v vo 4.4 v reset pull-up resistance r ro 18 30 46 k ? reset low voltage v ro 0.4 v ct upper-side threshold v cth 1.80 v ct lower-side threshold v ctl 0.45 v ct charge current i ct 16 a v ct = 0.15 v ct discharge current i ct 3 a v ct = 1.35 v delay time l h t d 8 11.5 16 ms c ct = 0.1 f (note 1) wdt monitor time t wh 30 45 66 ms c ct = 0.1 f (note 1) wdt reset time t wl 5 9 15 ms c ct = 0.1 f (note 1) wdt off threshold voltage v hclk v o 0.8 v o v wdt on threshold voltage v lclk 0 v o 0.3 v clk is pulled down inside the ic when clk open. clk input current i clk 1.5 5 15 a v clk = 5 v clk input pulse width t pclk 3 s minimum operation voltage v opr 1 v ro < 0.5 v (note 1) t d , t wh , and t wl can be varied by changing the ct capacitance value. ( 0.001 f to 10 f available ) t d (ms) t d (the deley time at 0.1 f) c ct ( f) / 0.1 ct capacitor: 0.1 f c ct 10 f for example: when c ct = 1 f, 80ms t d 160 ms t wh (ms) t wh (the wdt monitor time at 0.1 f) c ct ( f) / 0.1 ct capacitor: 0.1 f c ct 10 f for example: when c ct = 1 f, 300ms t d 660 ms t wl (ms) t wl (the wdt reset time at 0.1 f) c ct ( f) / 0.1 ct capacitor: 0.1 f c ct 10 f for example: when c ct = 1 f, 50ms t d 150 ms t d (ms) t d (the delay time at 0.1 f) c ct ( f) / 0.1 0.1 ct capacitor: 0.001 f c ct < 0.1 f for example: when c ct = 0.01 f, 0.7ms t d 1.7 ms t wh (ms) t wh (the wdt monitor time at 0.1 f) c ct ( f) / 0.1 ct capacitor: 0.001 f c ct < 0.1 f for example: when c ct = 0.01 f, 2.9ms t d 6.7 ms t wl (ms) t wl (the wdt reset time at 0.1 f) c ct ( f) / 0.1 ct capacitor: 0.001 f c ct < 0.1 f for example: when c ct = 0.01 f, 0.4ms t d 1.6 ms downloaded from: http:///
datasheet d a t a s h e e t 8/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves (unless otherwise specified, tj = 25 c, v cc = 13.5 v, v ctl = 5 v) 0 1 2 3 4 5 6 024681 0 output voltage : v o [v] supply voltage : v cc [v] t = - t = t = 0 1 2 3 4 5 6 0 1 02 03 04 05 0 output voltage : v o [v] supply voltage : v cc [v] t = - t = t = 4.8 4.9 5.0 5.1 5.2 -40 0 40 80 120 160 output voltage : v o [v] junction temperature : tj [ ] figure 2. output voltage vs supply voltage (r l = 25 ? ) figure 3. output voltage vs junction temperature (r l = 1 k ? ) figure 4. circuit current vs supply voltage figure 1. output voltage vs supply voltage (r l = 25 ? ) 0 300 600 900 1200 1500 0 1 02 03 04 05 0 circuit current : i cc [ a] supply voltage : v cc [v] tj = -40 c tj = 25 c tj = 150 c downloaded from: http:///
datasheet d a t a s h e e t 9/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves - continued 0 1 2 3 4 5 6 0 200 400 600 800 1000 1200 output voltage: v o [v] output current : i o [ma] tj = -40 c tj = 25 c tj = 150 c figure 6. circuit current vs output current figure 5. circuit current vs junction temperature figure 8. output current vs junction temperature figure 7. output voltage vs. output current (over current protection) 800 900 1000 1100 1200 -40 0 40 80 120 160 output current : i o [ma] junction temperature : tj [ ] 0 30 60 90 120 150 0 100 200 300 400 500 600 circuit current :i cc [ a] output current : i o [ma] 50 70 90 110 130 150 -40 0 40 80 120 160 circuit current :i cc [ a] junction temperature : tj [ ] downloaded from: http:///
datasheet d a t a s h e e t 10/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves - continued 0 1 2 3 4 5 6 1 0 01 2 01 4 01 6 01 8 0 output voltage:v o [v] junction temperature : tj [ ] 0 100 200 300 400 500 600 0 100 200 300 400 500 drop voltage : v d [mv] output current : i o [ma] tj = -40 c tj = 25 c tj = 150 c figure 9. drop voltage vs output current (v cc = 4.75 v) figure 10. output voltage vs junction temperature (thermal shut down) figure 11. output voltage vs ctl voltage figure12. ctl voltage vs junction temperature 0 1 2 3 4 5 -40 0 40 80 120 160 ctl voltage : v ctl [v] junction temperature : tj [ ] ctl on ctl off 0 1 2 3 4 5 6 012345 output voltage : v o [v] ctl voltage : v ctl [v] tj = -40 c tj = 25 c tj = 150 c downloaded from: http:///
datasheet d a t a s h e e t 11/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves - continued figure 15. ro voltage vs output voltage figure 14. output detecting voltage vs junction temperature figure 13. output voltage vs ctl current figure 16. ro voltage vs output voltage 0 1 2 3 4 5 6 4.4 4.5 4.6 4.7 4.8 reset voltage : v ro [v] output voltage : v o [v] tj = -40 c tj = 25 c tj = 150 c 0 5 10 15 20 25 30 -40 0 40 80 120 160 ctl current : i ctl [ a] junction temperature : tj [ ] 0 1 2 3 4 5 6 0.0 1.0 2.0 3.0 4.0 5.0 6.0 reset voltage : v ro [v] output voltage : v o [v] tj = -40 c tj = 25 c tj = 150 c 4.4 4.5 4.6 4.7 4.8 4.9 -40 0 40 80 120 160 output detecting voltage : v rt [v] junction temperature : tj [ ] vrt + vrhy vrt v rt v rt + v rhy downloaded from: http:///
datasheet d a t a s h e e t 12/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves - continued 0.01 0.1 1 10 100 1000 10000 0.001 0.01 0.1 1 10 power on reset time : t por [ms] ct capacitance : c ct [ f] 8 10 12 14 16 -40 0 40 80 120 160 power on reset time : t por [ms] junction temperature : tj [ ] figure 19. power on reset time vs junction temperature (c ct = 0.1 f) figure 20. power on reset time vs ct capacitance figure 17. ct current vs junction temperature figure 18. ct voltage vs junction temperature 0.0 0.4 0.8 1.2 1.6 2.0 2.4 -40 0 40 80 120 160 ctl voltage : v ct [v] junction temperature : tj [ ] vcth vctl v cth v ctl 0 4 8 12 16 20 -40 0 40 80 120 160 ct current : i ct [ a] junction temperature : tj [ ] ict charge ict discharge i ct charge i ct discharge downloaded from: http:///
datasheet d a t a s h e e t 13/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves - continued figure 21. watch dog time vs junction temperature figure 22. watch dog time vs ct capacitance 0 10 20 30 40 50 60 70 -40 0 40 80 120 160 watch dog time : t wh, t wl [ms] junction temperature : tj [ ] wh wl t wh t wl 0.01 0.1 1 10 100 1000 10000 0.001 0.01 0.1 1 10 watch dog time : t wh, t wl [ms] ct capacitance : c ct [ f] wh wl t wh t wl downloaded from: http:///
datasheet d a t a s h e e t 14/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 measurement circuit vcc ctl ro gnd ct clk vo fin a 0.1f 0.1f 10f v vcc ctl ro gnd ct clk vo fin v i o 0.1f 0.1f 10f vcc ctl ro gnd ct clk vo fin 0.1f 0.1f 10f a vcc ctl ro gnd ct clk vo fin 0.1f 0.1f 10f vcc ctl ro gnd ct clk vo fin v 0.1f 0.1f 10f measurement setup for figure 7,8. measurement setup fo r figure 1,2,3,10. measurement setup for figure 4,5. measurement setup for figure 11,12,13. measurement setup for figure 9. measurement setup for figure 6. measurement setup for figure 17,18. measurement setup for figure 19,20,21,22. figure 23. measurement circuit measurement setup for figure 14,15,16. vcc ctl ro gnd ct clk vo fin 0.1f 0.1f 10f i o a vcc ctl ro gnd ct clk vo fin v 0.1f 0.1f 10f vcc ctl ro gnd ct clk vo fin v 0.1f 0.1f 10f v a vcc ctl ro gnd ct clk vo fin hz 0.1f 0.1f 10f hz downloaded from: http:///
datasheet d a t a s h e e t 15/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart 1. when supply voltage v cc is on ? off (not to input clk voltage v clk when output voltage v o = low) figure 24. timing chart 1 downloaded from: http:///
datasheet d a t a s h e e t 16/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart C continued 2. when output control voltage v ctl is on ? off (not to input clk voltage v clk when output voltage v o = low) the delay time ( t d ) is estimated roughly by following calculation. basically, verify the delay time ( t d ) by the ratio of the value at c ct = 0.1 f specified in datasheet and the actual c ct capacitance used to calculate. t s v v c f i charge a figure 25. timing chart 2 downloaded from: http:///
datasheet d a t a s h e e t 17/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 timing chart C continued 3. when wdt threshold voltage v clk is on ? off the wdt monitor time ( t wh ) and the wdt reset time ( t wl ) is estimated roughly by following calculation. basically, verify the wdt monitor time ( t wh ) and the wdt reset time ( t wl ) by the ratio of the value at c ct = 0.1 f specified in datasheet and the actual c ct capacitance used to calculate t s |v v |v c f i discharge a t s |v v |v c f i charge a figure 26. timing chart 3 t d t wh t wl t pclk v rhys v thh v cc v ctl v ro v cth v ctl v ct v clk v o v rt 13.5v P v o 5v 5v 5v 0v downloaded from: http:///
datasheet d a t a s h e e t 18/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 selection of components externally connected ? vcc pin capacitor insert capacitors with a capacitance of 0.1 f or higher between the vcc and gnd pin. we recommend using ceramic capacitor generally featuring good high frequency c haracteristic. when selecting a ceramic capacitor, please be consider about temperature and dc - biasing characterist ics. place capacitors closest possible to vcc - gnd pin. when input impedance is high, e.g. in case there is distanc e from battery, line voltage drop needs to be prevented by large capacitor. choose the capacitance according to the line impedance between the power smoothing circuit and the vcc pin. selection of t he capacitance also depends on the applications . verify the application and allow sufficient margins in the design. we recommend using a capacitor with excellent voltage and temperature characteristics. ? output pin capacitor in order to prevent oscillation, a capacitor needs to be placed between t he output pin and gnd pin. we recommend using a ceramic capacitor with a capacitance of 6 f or higher. in selecting the capac itor, ensure that the capacitance of 6 f or higher is maintained at the intended applied voltage and temperature range. due to changes in temperature the capacitor's capacitance can fluctuate possibly resulting in oscillation. in actual applications the stable o perating range is influenced by the pcb impedance, input supply impedance and load impedance. therefore verification of the final op erating environment is needed. when selecting a ceramic capacitor, we recommend using x7r or better compone nts with excellent temperature and dc - biasing characteristics and high voltage tolerance. in case of the transient input voltage and the load current fluctuation, output voltage ma y fluctuate. in case this fluctuation can be problematic for the applicati on, connect low esr capacitor (capacitance > 6 f, esr < 1 ? ) in paralleled to large capacitor with a capacitance of 13 f or higher and esr of 5 ? or lower. electrolytic and tantalum capacitors can be used as large capacitor. when selecting an el ectrolytic capacitor, please consider about increasing esr and decreasing capacitance at cold temperature. place the capacitor closest possible to output pin. figure 27. output capacitance esr available area -40 c tj +150 c, 6v v cc 45 v, v ctl = 5 v, i o = 0 ma to 550ma 0 1 2 3 4 5 6 1 10 100 1000 esr [ ? ] output capacitance : c o [ f] stable available area unstable available area downloaded from: http:///
datasheet d a t a s h e e t 19/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 power dissipation hrp7 ic mounted on rohm standard board based on jedec. : 1 - layer pcb (copper foil area on the reverse side of pcb: 0 mm x 0 mm) board material: fr4 board size: 114.3 mm x 76.2 mm x 1.57 mmt mount condition: pcb and exposed pad are soldered. top copper foil: rohm recommended footprint + wiring to measure, 2 oz. copper. : 4 - layer pcb (2 inner layers and copper foil area on the reverse side of pcb: 74.2 mm x 74.2 mm) board material: fr4 board size: 114.3 mm x 76.2 mm x 1.60 mmt mount condition: pcb and exposed pad are soldered. top copper foil: rohm recommended footprint + wiring to measure, 2 oz. copper. 2 inner layers copper foil area of pcb: 74.2 mm x 74.2 mm, 1 oz. copper. copper foil area on the reverse side of pcb: 74.2 mm x 74.2 mm, 2 oz. copper. condition : ja = 96.0 c/w jt (top center) = 6 c/w condition : ja = 22.0 c/w jt (top center) = 2 c/w to263-7 ic mounted on rohm standard board based on jedec. : 1 - layer pcb (copper foil area on the reve rse side of pcb: 0 mm x 0 mm) board material: fr4 board size: 114.3 mm x 76.2 mm x 1.57 mmt mount condition: pcb and exposed pad are soldered. top copper foil: rohm recommended footprint + wiring to measure, 2 oz. copper. : 4 - layer pcb (2 inner layers and copper foil area on the reverse side of pcb: 74.2 mm x 74.2 mm) board material: fr4 board size: 114.3 mm x 76.2 mm x 1.60 mmt mount condition: pcb and exposed pad are soldered. top copper foil: rohm recommended footprint + wiring to measure, 2 oz. copper. 2 inner layers copper foil area of pcb: 74.2 mm x 74.2 mm, 1 oz. copper. copper foil area on the reverse side of pcb: 74.2 mm x 74.2 mm, 2 oz. copper. condition : ja = 80.7 c/w jt (top center) = 8 c/w condition : ja = 20.3 c/w jt (top center) = 2 c/w figure 28. hrp7 package data 5.7 w 1.3 w 0 2 4 6 8 10 02 55 07 51 0 01 2 51 5 0 power dissipation: pd[w] ambient temperature: ta[c] figure 29. to263-7 package data 1.55 w 6.16 w 0.0 2.0 4.0 6.0 8.0 10.0 0 25 50 75 100 125 150 power dissipation: pd[w] ambient temperature: ta [c] downloaded from: http:///
datasheet d a t a s h e e t 20/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 thermal design this product exposes a frame on the back side of the package for thermal efficiency improvement. within this ic, the power consumption is decided by the dropo ut voltage condition, the load current and the circuit current. refer to power dissipation curves illustrated in figur e 28, 29 when using the ic in an environment of ta 25 c. even if the ambient temperature ta is at 25 c, depending on the input vo ltage and the load current, chip junction temperature can be very high. consider the design to be tj tjmax = 150 in all possible operating temperature range. should by any condition the maximu m junction temperature tjmax = 150 rating be exceeded by the temperature increase of the chip, it may result in deterioration of the properties of the chip. the therma l impedance in this specification is based on recommended pcb and measurement condition by jedec standard. verify the application and allow sufficient margins in the thermal design by the following method is used to calculate the junction temperature tj. tj can be calculated by either of the two following methods. 1. the following method is used to ca lculate the junction temperature tj. tj = ta + p c ja tj : junction temperature ta : ambient temperature p c : power consumption ja : thermal impedance (junction to ambient) 2. the following method is also used to calculate the junction temperature tj. tj = t t + p c jt tj : junction temperature t t : top center of cases (mold) temperature p c : power consumption jt : thermal impedance (junction to top center of case) the following method is used to calculate the power consumption p c (w). p c = (v cc - v o ) i o + v cc i cc p c : power consumption v cc : supply voltage v o : output voltage i o : load current i cc : circuit current ? calculation example if v cc = 13.5 v v o = 5.0 v i o = 200 ma i cc = 85 a, the power consumption p c can be calculated as follows: p c = (v cc - v o ) i o + v cc i cc = (13.5 v C 5.0 v) 200 ma + 13.5 v 85 a = 1.7 w at the ambient temperature tamax = 85c, t he thermal impedance ( junction to ambient ) ja = 22.0 c / w( 4-layer pcb ), tj = tamax + p c ja = 85 c + 1.7 w 22.0 c / w = 122.4 c when operating the ic, the top center of cases (mold) temperature t t = 100 jt = 6 c / w( 1-layer pcb ), tj = t t + p c jt = 100 c + 1.7 w 6 c / w = 110.2 c for optimum thermal performance, it is recommended to ex pand the copper foil area of the board, increasing the layer and thermal via between thermal land pad. downloaded from: http:///
datasheet d a t a s h e e t 21/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 application examples ? applying positive surge to the vcc if the possibility exists that surges higher than 45 v will be applied to the vcc, a zener diode should be placed between the vcc and gnd as shown in the figure below. ? applying negative surge to the vcc if the possibility exists that negative surges lower than the gnd are applied to the vcc, a shottky diode should be place between the vcc and gnd as shown in the figure below. ? implementing a protection diode if the possibility exists that a large inductive load is connect ed to the output pin resulting in back-emf at time of startup and shutdown, a protection diode should be placed as shown in the figure below. ? reverse polarity diode in some applications, the vcc and the vo potential might be reversed, possibly resulting in circuit internal damage or damage to the elements. for example, t he accumulated charge in the output pin ca pacitor flowing backward from the vo to the vcc when the vcc shorts to the gnd. in order to minimize the damage in such case, use a capacitor with a capacitance less than 1000 f. also by inserting a reverse polarity diode in series to the vcc, it can prevent reverse current from reverse battery connection or the case. when the point a is short-circuited gnd, if there may be any possible case point b is short-circuited to gnd, we also recommend using a bypass diode between the vcc and the vo. vcc vo gnd vcc vo gnd vcc vo gnd bypass diode vcc vo gnd a b reverse polarity diode downloaded from: http:///
datasheet d a t a s h e e t 22/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 i/o equivalence circuits (note 1) (note 1) resistance value is typical. 1 vcc 2 ctl 3 ro 5 ct 6 clk 7 vo 1000 k ? 50 k ? 50 k ? 1 k ? 5 k ? 370 k ? 340 k ? 140 k ? 370 k ? 140 k ? 0.1 k ? 30 k ? 525 k ? 1550 k ? 10 k ? downloaded from: http:///
datasheet d a t a s h e e t 23/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 operational notes 1. reverse connection of power supply connecting the power supply in reverse polarity can damage the ic. take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the ics power supply terminals. 2. power supply lines design the pcb layout pattern to provide low impedance s upply lines. separate the gro und and supply lines of the digital and analog blocks to prev ent noise in the ground and supp ly lines of the digital bloc k from affecting the analog block. furthermore, connect a capacitor to ground at all power supply pins. cons ider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. ground voltage ensure that no pins are at a voltage below that of t he ground pin at any time, even during transient condition. 4. ground wiring pattern when using both small-signal and large-current ground traces , the two ground traces should be routed separately but connected to a single ground at the refer ence point of the application board to av oid fluctuations in the small-signal ground caused by large currents. also ensure that the ground trac es of external components do not cause variations on the ground voltage. the ground lines must be as s hort and thick as possible to reduce line impedance. 5. thermal consideration the power dissipation under actual op erating conditions should be taken into consideration and a sufficient margin should be allowed for in the thermal design. on the reverse side of the package this product has an exposed heat pad for improving the heat dissipation. use both the front and reverse side of the pcb to increase the heat dissipation pattern as far as possible. the amo unt of heat generated depends on the vo ltage difference across the input and output, load current, and bias current. therefore, when actually using the chip, ensure that the generated heat does not exceed the pd rating. should by any condition the maximum junction temperature tjmax = 150 rating be exceeded by the temperature increase of the chip, it may result in deterioration of the properties of the chip. the thermal impedance in this specification is based on recommended pcb and measurement condition by jede c standard. verify the application and allow sufficient margins in the thermal design. 6. recommended operating conditions these conditions represent a range within which the expect ed characteristics of the ic can be approximately obtained. the electrical characteristics are guaranteed under the conditions of each parameter. 7. rush current when power is first supplied to the ic, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the ic has more than one power supply. therefore, give special consideration to power coup ling capacitance, power wiring, width of ground wiring, and routing of connections. 8. testing on application boards when testing the ic on an application board, connecting a capacitor directly to a low-impedance output pin may subject the ic to stress. always discharge capacitors completely after each process or step. the ics power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. to prevent damage fr om static discharge, ground the ic during as sembly and use similar precautions during transport and storage. 9. inter-pin short and mounting errors ensure that the direction and position are correct when mounting the ic on the pc b. incorrect mounting may result in damaging the ic. avoid nearby pins being shorted to each ot her especially to ground, power supply and output pin. inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. downloaded from: http:///
datasheet d a t a s h e e t 24/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 operational notes C continued 10. unused input terminals input terminals of an ic are often connected to the gate of a mo s transistor. the gate has extremely high impedance and extremely low capacitance. if left uncon nected, the electric field from the outside can easily charge it. the small charge acquired in this way is enough to produce a signif icant effect on the conduction through the transistor and cause unexpected operation of the ic. so unless otherwise specified, unused i nput terminals should be connected to the power supply or ground line. 11. regarding the input pin of the ic this monolithic ic contains p+ isolat ion and p substrate layers between adj acent elements in order to keep them isolated. p/n junctions are formed at the intersection of these p layers with the n layers of other elements to create a variety of parasitic elements. for example, in case a resistor and a transistor are c onnected to the pins as shown in the figure below then: the p/n junction functions as a parasitic diode when the gnd > pin a for the resi stor, or the gnd > pin b for the transistor. also, when the gnd > pin b for the transistor (npn), th e parasitic diode described above combines with the n layer of the other adjacent elements to operate as a parasitic npn transistor. parasitic diodes inevitably occur in the structure of the ic . their operation can result in mutual interference between circuits and can cause malfunctions and, in turn, physical damage to or destruction of the chip. therefore do not employ any method in which parasitic diodes can operate su ch as applying a voltage to an input pin that is lower than the (p substrate) gnd. 12. ceramic capacitor when using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to dc bias and others. 13. thermal shutdown circuit (tsd) this ic incorporates and integrated t hermal shutdown circuit to prevent heat damage to the ic. normal operation should be within the power dissipation rating, if however th e rating is exceeded for a continued period, the junction temperature (tj) will rise and the tsd circuit will be activate d and turn all output pins off. after the tj falls below the tsd threshold the circuits are automatic ally restored to normal operation. note that the tsd circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no circumstances, should the tsd circuit be used in a set de sign or for any purpose other than protecting the ic from heat damage. 14. over current protection circuit (ocp) this ic incorporates an integrated over current protection circuit that is acti vated when the load is shorted. this protection circuit is effective in pr eventing damage due to sudden and unexpect ed incidents. however, the ic should not be used in applications characterized by continuous operation or transitioning of the protection circuit. downloaded from: http:///
datasheet d a t a s h e e t 25/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 ordering information b d 4 2 7 1 x x x - c x x part numbe r packagehfp: hrp7 fp2: to263-7 packaging and forming specification tr: embossed tape and reel e2: embossed tape and reel marking diagram part number marking package orderable part number bd4271 hrp7 bd4271hfp-ctr bd4271 to263-7 BD4271FP2-Ce2 hrp7 (top view) bd4271 part number marking lot number 1pin mark to263-7 (top view) bd4271 part number marking lot numbe r 1pin downloaded from: http:///
datasheet d a t a s h e e t 26/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 physical dimension, tape and reel information package name hrp7 downloaded from: http:///
datasheet d a t a s h e e t 27/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 physical dimension, tape and reel information package name to263-7 direction of feed 1pin reel t qy t w w y y < tape and reel information > downloaded from: http:///
datasheet d a t a s h e e t 28/28 tsz02201-0g9g0an00610-1-2 21.jun.2016 rev.002 bd4271hfp-c BD4271FP2-C ? 2016 rohm co., ltd. all rights reserved. www.rohm.co.jp tsz22111 ? 15 ? 001 revision history date revision changes mar.30.2016 001 new release. jun.21.2016 002 to263-7 pkg added. thermal resistance format updated. downloaded from: http:///
notice-paa-e rev.003 ? 201 5 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. if you intend to use our products in devices requiring extreme ly high reliability (such as medical equipment (note 1) , aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life , bodily injury or serious damage to property ( specific applications ), please consult with the rohm sales representative in advance. unless otherwise agreed in writin g by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any rohm s products for specific applications. (note1) medical equipment classification of the specific applic ations japan usa eu china class class class b class class ? class 2. rohm designs and manufactures its products subject to stri ct quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adeq uate safety measures including but not limited to fail-safe desig n against the physical injury, damage to any property, whic h a failure or malfunction of our products may cause. the followi ng are examples of safety measures: [a] installation of protection circuits or other protective devic es to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are no t designed under any special or extraordinary environments or conditions, as exemplified below . accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or c onditions (as exemplified below), your independent verification and confirmation of product performance, reliabil ity, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, including water, oils, chemicals, and organi c solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products are e xposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed t o static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing component s, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subject to radiation-proof design. 5. please verify and confirm characteristics of the final or mou nted products in using the products. 6 . in particular, if a transient load (a large amount of load appl ied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mou nting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating u nder steady-state loading condition may negatively affec t product performance and reliability. 7. de -rate power dissipation depending on ambient temperature. wh en used in sealed area, confirm that it is the use in the range that does not exceed the maximum junction temperature. 8 . confirm that operation temperature is within the specified range desc ribed in the product specification. 9 . rohm shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc .) flux is used, the residue of flux may negatively affect prod uct performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method mus t be used on a through hole mount products. i f the flow soldering method is preferred on a surface-mount p roducts, please consult with th e rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
notice-paa-e rev.003 ? 201 5 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, p lease allow a sufficient margin considering variations o f the characteristics of the products and external components, inc luding transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and a ssociated data and information contain ed in this document are presented only as guidance for products use. therefore, i n case you use such information, you are solely responsible for it and you must exercise your own independ ent verification and judgment in the use of such information contained in this document. rohm shall not be in any way respon sible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such informat ion. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take p roper caution in your manufacturing process and storage so t hat voltage exceeding the products maximum rating will not be applied to products. please take special care under dry co ndition (e.g. grounding of human body / equipment / solder iro n, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate if the products are stored in the places where: [a] the products are exposed to sea winds or corrosive gases, in cluding cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderabil ity of products out of recommended storage time period may be degraded. it is strongly recommended to confirm so lderability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indi cated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humi dity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage tim e period. precaution for product label a two-dimensional barcode printed on rohm products label is f or rohm s internal use only. precaution for disposition when disposing products please dispose them properly usi ng an authorized industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under listed items of export control prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to appl ication example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. 2. rohm shall not have any obligations where the claims, a ctions or demands arising from the combination of the products with other articles such as components, circuits, systems or ex ternal equipment (including software). 3. no license, expressly or implied, is granted hereby under any inte llectual property rights or other rights of rohm or any third parties with respect to the products or the information contai ned in this document. provided, however, that rohm will not assert its intellectual property rights or other rights a gainst you or your customers to the extent necessary to manufacture or sell products containing the products, subject to th e terms and conditions herein. other precaution 1. this document may not be reprinted or reproduced, in whole or in p art, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified , reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any way whatsoever the pr oducts and the related technical information contained in the products or this document for any military purposes, includi ng but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice ? we rev.001 ? 2015 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

▲Up To Search▲

Price & Availability of BD4271FP2-C

	To Download BD4271FP2-C Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .